instaciating the same architecture twice gives different results

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Hi,

unfortunately I don't see a clear pattern, but I can tell that

* resetting the design doesn't make a difference

* when switching off and programming the FPGA again (same design) it sometimes works

* compiling the design again SEEMS to effect which Tx works

I know this is a very vague description, but this problem is really weird.

At the moment I'm trying to create a floorplan for the design (LogicLock regions etc.) so that the components for one Tx are in one place. But for a well implemented design it shouldn't matter where the components are located, right?

kind regards

Christoph

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Hi,

in TimeQuest you can get the info about "Unconstraint Paths". Maybe it good to have a look at it. Is there any kind of SW control involed ???

Kind regards

GPK