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Altera_Forum
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10 years ago

Inserting SignalTap without re-routing design

I need to examine some internal signals in an existing FPGA design that was not set up for incremental compile (no design partitions specified for incremental compile). Is there a way to add a signa...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi Rysc

So I finally got signal tap in a separate partition. Basically it required 3 compilations. Here is what I did.

Compile 1:

I had compiled the design and decided to tap it for debugging.

Compile 2:

I created a partition for my design.

In Project Navigator window I clicked on Hierarchy tab. Selected the module that I wanted to preserve. Right clicked on it and selected Design Partition-->Set as Design Partition.

Now I could see my module in Design Partition Window. I changed its Netlist type to Post-Fit.

Compile 3:

Now I added a signal tap to the project.

I can see the design being preserved in the reports now.

Question

Is it possible to view Pre-synthesis nodes in signal tap using this method (Im trying it out right now)? The signals that I want to see are not visible in Post fit mode.

Thanks for your help