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Altera_Forum's avatar
Altera_Forum
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12 years ago

Inserting custom verilog into OpenCL toolflow

I'm looking to write some custom verilog code and add it to my OpenCL auto-generated Qsys system. The problem is, I want this newly modified system to be generated as a ,aocx file. Is this pos...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hello,

In 15.1 we'll have a feature called "libraries" introduced in early access stage to some customers (and it will go public in 16.0). It will allow packaging custom RTL that behaves similar to OpenCL pipeline (stallable, single clock, streaming interface) into a library of functions. These functions can be called from OpenCL kernels as regular C functions. Their RTL implementation would be automatically stitched into the OpenCL system for you.

Stay tuned!