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Altera_Forum
Honored Contributor
Honored ContributorInserting custom verilog into OpenCL toolflow
I'm looking to write some custom verilog code and add it to my OpenCL auto-generated Qsys system. The problem is, I want this newly modified system to be generated as a ,aocx file. Is this pos...
Altera_ForumHonored Contributor
Honored ContributorAfter running aoc -c <mykernel>.cl, the corresponding HDL code of your kernel has not been generated yet. So, it is impossible to add custom verilog code.
I am also interested in inserting custom verilog into OpenCL toolflow. It is critical to achieve optimum performance.
