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Altera_Forum
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13 years ago

Improving Fitter Routing

Hi, I am trying to fit an exponentiation algorithm which processes data of widths 4K bits at a time on a cyclone 2 chip. The number of logic elements are currently within the device specificat...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Sounds like the routing is getting conjested - do you have a lot of combinatorial logic? If it wont even finish the fit, the thing I can really think of is trying to pipeline as much as you can. Then maybe as a deeper step, look at logic lock regions. Design space exploration might be an option, but if it wont fit on a single run, using multiple seeds is unlikely to help.