Implementing MIPI DSI-2 on an Agilex 5 device

Great cat picture!

I'm using Quartus 25.1.1 Prime Pro and the Questa FPGA (not starter edition) simulator that comes with it.

I've been re-generating an entirely new design example to a new directory after each change. See the screen shots of the MIPI IP tabs (below).

When the design example finishes building, I cd into the mentor directory:

cd ~/mipi_example/new/ed_sim/sim/mentor

launch vsim

vsim &

Once Questa starts, inside the main Questa window

source run_msim_setup.tcl

# dsi2_ed_sim_tb.test_inst: STARTING TEST!
# dsi2_ed_sim_tb.test_inst: Running test with 10 frames
# dsi2_ed_sim_tb.test_inst: Using VVP Image Information Config: '{}
# dsi2_ed_sim_tb.test_inst: Line Packet Length = 384 Bytes;
# dsi2_ed_sim_tb.test_inst:
# dsi2_ed_sim_tb.test_inst.run_test: Loading Tasklist to execute!
# dsi2_ed_sim_tb.test_inst.run_test: Estimated Tasklist size: 3860
# dsi2_ed_sim_tb.test_inst.run_test: Finished loading Tasklist!
# dsi2_ed_sim_tb.test_inst.run_test: This Tasklist contains: 991 tasks to execute!
# dsi2_ed_sim_tb.test_inst.run_test:
# dsi2_ed_sim_tb.test_inst.axis_source: Sending VVP Image Information Packet: 67005f007f0240
# dsi2_ed_sim_tb.test_inst.axis_sink : Received VVP Image Information Packet: 67005f007f0240
# ** Error: <protected>.<protected>: Unsupported data_type 0x00 for this function
# Time: 240163333333 fs Scope: <protected>.<protected> File: ../../hdl/sv_packages/mipi_pkg.sv Line: 130
# dsi2_ed_sim_tb.test_inst.axis_sink : Received VVP start of a new field of video
# ** Error: 1dsi2_ed_sim_tb.test_inst.axis_sink : Byte Error: Received 1 [0x1] expected 0 [0x0]
# Time: 240846666666 fs Scope: dsi2_ed_sim_tb.test_inst.axis_sink.check_byte File: ../../hdl/axis_sink.sv Line: 78
# dsi2_ed_sim_tb.test_inst.axis_sink : Byte Error at position 0 of 2000001 [0x2000001]
# ** Fatal: dsi2_ed_sim_tb.test_inst.axis_sink : Byte Error!
# Time: 240846666666 fs Scope: dsi2_ed_sim_tb.test_inst.axis_sink.check_remaining_pkt_bytes File: ../../hdl/axis_sink.sv Line: 147
# ** Note: $finish : ../../hdl/axis_sink.sv(147)
# Time: 240846666666 fs Iteration: 7 Region: /dsi2_ed_sim_tb/test_inst/run_test

# 1
# Break at ../../hdl/axis_sink.sv line 147

That's were it ends.