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Altera_Forum
Honored Contributor
11 years agoID 12006 Undefined entity
Hi just a quick run down of what im trying to achieve write a value to my verilog code and read back the double value (input*2) gonna expand later on...(im new to FPGA) ive greated a Qsys modul...
Altera_Forum
Honored Contributor
11 years agoHere is the error:
nios_setup ( If you look at how you did your pll you have, all_pll alt_pll_inst( module ----- instance your nios_setup declaration is missing either the module name or the instance name