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Altera_Forum
Honored Contributor
11 years agoI2C inout simulation
I am using VHDL to try and simulate an I2C master and slave. My slave has an inout port named i2c_sda. My master has a in port named i2c_sda_in and a output port named i2c_sda_out. In...
Altera_Forum
Honored Contributor
11 years ago --- Quote Start ---
- in both devices (master and slave) detect a logic 1 by using the statement "if(signal = '1' or signal='H')", instead of just saying "if(signal = '1')"; this will make sure you detect a logic 1 regardless of how you drive it