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Altera_Forum
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7 years ago

I have a few simplistic code confusions

First question: Say we have: a : STD_LOGIC_VECTOR(0 TO 4); b : STD_LOGIC_VECTOR(2 TO 6); b <= "10100"; a <= b; How do the bits get assigned to "a" here? Does it go like this:...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

1. Correct. The position always matches based assigning 'left <= 'left and so on.

2. Yes, this is a logic construct. But be aware the synthesis tool will do logic reduction to remove unnecessary logic and may merge cells if they have the same function, etc. So any diagrams may not be identical to your code, but should be functionally identical.