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Altera_Forum's avatar
Altera_Forum
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9 years ago

I got this warning messages. Is is OK?

Hello,

I don't have good english skills.

but I want to know this mesaages as bellow.

Warning (13012): Latch N_XDIO_OE_CPU$latch has unsafe behavior

Warning (13013): Ports D and ENA on the latch are fed by the same signal N_XZCS0

Warning (10631): VHDL Process Statement warning at CPLD_120mm_CPU.vhd(55): inferring latch(es) for signal or variable "N_CPLD_TEST", which holds its previous value in one or more paths through the process

I am using EPM1270T144I5N device.

I am using well the device. but I got that warning messages. So I am worried because of the messages.

If I have to solve that messages, What I have to do? please help me.

I will wait for reply.

thank you for reading.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    9 years ago

    Latches are created when your code infers memory between states. Latches may work but their timing can be affected by temperature, voltage, process, so the behaviour of the circuit may vary over time and with temperature and between compiles (ie. it may work now, but the next time you compile it it may not work).

    If you intended a latch, then theres no problem. But if you are worried about the effects above, you should make the circuit fully synchronous.