I can't compile my code to generate a PWM signal

I suggest the following:

set your inputs as follows:

a: in std_logic_vector(15 downto 0);

b: in std_logic_vector(7 downto 0);

clkin: in std_logic;

clkout: out std_logic

(a) to be your clkout period in clk samples (not absolute time and not frequency)

(b) is duty cycle but scaled by 128/100(to avoid division)

compute (b1) from (a) & (b) in logic as follows:

in logic multiply (b) by (a) then discard 7 bits b1 = a*b/128 (e.g. for 27% duty cycle b1 = a*35/128)

run a counter on clk starting from zero and increment by 1 till a value equal to (a-1) and back.

finally decide clkout logic: if count = (b1-1) clkout to be high and if count = (a-1) clkout to be low (or the reverse).