I am using a Cyclone V GT and CVP on PCI Express. I have programmed the flash and uploaded the core.rbf. I am trying to use signal tap to look at signals in the core. Signal Tap application shows "invalid JTAG configuration". Suggestions?

Hi Nooraini,

Thanks for the reply. I finally found the answer, you can’t put a signal tap instance in the CVP core partition in a Cyclone V. It has to reside in the top partition so to tap nodes in the CVP core partition, signals have to be passed up to the Periphery (top) .

https://www.intel.com/content/www/us/en/programmable/quartushelp/14.1/mergedProjects/msgs/msgs/wsgn_pr_tap_node_must_be_in_top.htm

A note added to the CVP documentation for Cyclone V about using SignalTap to look at core partition signals would be helpful for anyone trying this in the future.

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