Forum Discussion

Honored Contributor

13 years ago

Hyperlynx IBIS : What is cmos25_io_r50

Hi everyone, I'm currently performing Hyperlynx simulations of an Arria II Gx FPGA design. I generated my ibis model with Quartus 11.0sp1 So far, everything works pretty good however I have so...

Altera_Forum

Honored Contributor

10 years ago

cmos25_io_r50 is refer to 2.5V LVCMOS I/O model with 50 ohm series on-chip termination without calibration

Here is the example for naming convention on Stratix V IBIS models can be your references:

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd02082012_252.html

Forum Discussion

Hyperlynx IBIS : What is cmos25_io_r50

Recent Discussions

Quartus 20.1std compilation fails for Quartus map - Device 10AS057K2F40I1SG

Automatically added negative node for TDS output doesn't work with Agilex 5

Duplicate_hierarchy_depth / duplicate_register

QuartusPro 25.3 Crashed after using the Signal Tap Logic Analyzer

Is Quartus Prime Pro 22.4 Compatible with Stratix 10 NX Series Device 1SN21CEU2F55E2VG?