Forum Discussion
Altera_Forum
Honored Contributor
14 years agoI found a solution for the problem I cite above. This solution compiles but I have not tested it in hardware or simulation.
It consists on "encapsulating" the megafunction in a user-defined module in Verilog. This module acts as a carrier for the megafunction. As I understood from the tests I made, when we instantiate a megafunction in verilog we can assign to its input parameters any valid expression we want. The parameters are not restricted to a set of values that the GUI has (as shown in my previous reply). The carrier module should have the parameters we want to configure for the megafunction. Once the carrier module has been defined we can create its symbol. This symbol will have a parameter box. But since it is user defined, the value column of this parameter box is not restricted to anything. So we can specifi there any valid expression. Attached are images of an example I made. It shows only one megafunction and one parameter, but we can have more than one for both.