Honored Contributor
Honored Contributor- Drive strength and OCT are mutually exclusive assignments(in essence the drive strength is controlled by a resistor(transistors) and vice-versa. To a certain degree the two settings are just different ways of describing the same thing. Because of that you can't use both assignments. (I've never seen a direct correlation though, such as 12ma = an OCT value of# #.)
- The DDR2 timing is generally done with a "macro timing model". What this means is the entire interface was evaluated and guaranteed to work. (This allows for better performance. With the usual "micro timing model" when a lot of small micro-parameters are added together, each one has a little guardband, and as a whole the guardband gets unrealistic. So the macro timing model allows for higher performance. THe problem with the macro timing model is that you can't deviate from what was tested, because there's not modeling of that. So by changing something that you think should make the interface work better, it has to give a message that's basically saying you're using it in a way that doesn't correlate to the macro timing model, and so we can't do true timing analysis. So, you can choose to ignore this if you want, or go back to the old setting and leave it as is.
