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Altera_Forum
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11 years ago

How to use ip-generate on a hierarchical sys system

Hi, I am using ip-generate to compile a Qsys design into Verilog code than can be programmed into the FPGA and test benches for simulation. I have a single level Qsys system working, but my pri...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I uploaded the full report file:

ghrd_5astfd5k3_generation.rpt.txt.

I had to append the .txt to upload.

I need to figure out 2x things.

How to run sop_builder command line under Linux.

And what the arguments are to the script.

Thanks Martin