Forum Discussion
Altera_Forum
Honored Contributor
13 years agoI've very little experience with Verilog/SystemVerilog, so cannot provide much help in this area.
What happens if you write this as two separate tasks, i.e., task master1_set_and_push_command and task master2_set_and_push_command? This would result in the two BFMs being accessed from different tasks ... it would also result in unique objects/variables being passed to the BFMs, rather than common variables as you are using now ... though push_command() should copy everything allowing you to reuse those same variables in a subsequent call. Cheers, Dave