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Altera_Forum's avatar
Altera_Forum
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13 years ago

How to turn off the optimization that removes repeated logic?

Hi, I'm creating a small program using a block diagram. I want a propagation delay on a certain signal, so i've put in 2 not gates for this propagation delay. How do i disable the optimization ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

You can use the LCELL primitive, these won't be removed by optimization.

Note that the control you have over those delays is poor. It's subject to placement, process, voltage and temperature variations. Depending on what you need, using the programmable

delays on the output elements might work better.

Also, do you really need those delays?