How to tell the compiler that store operations are not dependent?

Hi HRZ,

Yes, that makes sense. The current design is just testing version. In the main design I will vectorize the output data to make efficient use of memory bandwidth.

I am also having some issues where this design works in the emulation mode (with strict channel depths) but on the FPGA it is giving wrong results. I am facing similar issues for another benchmark as well. I am using aoc 17.1 on Virtual Lab (VLAB) from Intel. Have you ever faced this issue? Here is the code: https://drive.google.com/file/d/1QcMYwOPU9onk4CiZx6YFD1pEYjXOSsbY/view?usp=sharing Can you see if there is any obvious bug?

Here are the commands that you can run. (You might need to modify the Makefile according to your aoc setup):

% make compile-emulation

% make compile-host

% make run-emulation

This will pass and give correct results.

FPGA flow:

% make compile-device

% make compile-host

% make run

runs it on FPGA but the results are all 0s

Thanks,

Nitish