Forum Discussion
BrianHG
Occasional Contributor
5 years agoHow to specify the 'Optimization Technique' in my System Verilog source code.
Hello,
I would like to specify which 'Optimization Technique' to be used for specific .sv modules in my code. I've tried:
/* synthesis CYCLONEII_OPTIMIZATION_TECHNIQUE = "SPEED" */
But ...
ak6dn
Regular Contributor
5 years agoWhenever I have shared code with others that required additional setup such as you seem to need, I supplied a MODULE.qsf file along with the MODULE.v (in my case) file.