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BrianHG's avatar
BrianHG
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

How to specify the 'Optimization Technique' in my System Verilog source code.

Hello, I would like to specify which 'Optimization Technique' to be used for specific .sv modules in my code. I've tried: /* synthesis CYCLONEII_OPTIMIZATION_TECHNIQUE = "SPEED" */ But ...
SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
4 years ago

Brian,


Assuming I understand your question correctly, have you consider to use preserve and keep attribute in Quartus? Maybe that's what you are looking for.


BrianHG's avatar
BrianHG
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Hello SyafieqS_Intel,

Thank you for recommending the (*preserve*). It has solved the 'auto-generated alt_syncram' and 'auto-generated altshift taps'. This allows my bus shift register to now exceed 300MHz as needed. Now the only thing left is for the a method to assign the 'CYCLONEII_OPTIMIZATION_TECHNIQUE' which appears to vastly help with performance on some of my combinational logic.

I wonder why the 'CYCLONEII_OPTIMIZATION_TECHNIQUE' is some sort of hidden synthesis setting deep in the menu separate of the normal compiler settings optimization mode which doesn't appear to do much for my code.