How to simulate and get waveform on Linux?

Hi, everyone!

Now, I have run into the problem that below for 2 days:

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Error: Can't synthesize current design -- design does not contain any logic

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But the project has two files, one is testbench, and another is real source code.

Why does such problem that there are no logic happen ?

What setting or/and source code is wrong ?

Plz tell me what perhaps is!

Thx!

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module hogege;

reg sw1, sw2; // ???????????

wire led; // ??????

nandtest nandtest1 (sw1, sw2, led); // ?????????

initial // ????

begin

sw1<= 0;

sw2 <= 0;

# 5 sw2 <= 1;

end

always begin

# 10 sw1 <= ~sw1;

end

always begin

# 16 sw2 <= ~sw2;

end

initial $monitor($stime, " sw1=%b sw2=%b led=%b", sw1, sw2, led);

endmodule

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`timescale 1ns / 1ps

module nandtest(input sw1, sw2, output led);

assign led = ~(sw1 & sw2); // ??????????????????

endmodule

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