Forum Discussion
ZhiqiangLiang
Occasional Contributor
Occasional Contributorhow to set those parameters of clock crossing bridge?
Hi, My FPGA model is Cyclone 10 LP 10CL120YF484. on Platform Designer, NIOS frequency is 80MHz, and my IP is 160MHz. In NIOS C code, I would like to read/write registers of my IP. In my design, ...
I reviewed some diagrams on the website, and based on what I saw, option 2 is actually the correct setup. The diagrams clearly indicate that option 2 is the proper way to connect.
KennyT_altera
Super Contributor
Super ContributorI’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
