Forum Discussion
Mahdi
Occasional Contributor
Occasional ContributorHow to reduce IC delay? Useful resources
Hello,
I have some basic questions:
My design includes a NIOS and an accelerator that is designed by myself. I designed a custom instruction to connect the accelerator and NIOS together. The cus...
Hi,
Do you require further assistances?
EBERLAZARE_I_Intel
Regular Contributor
Regular ContributorHi,
You can refer here to get some ideas on how to improve the accelerator:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/edh_ed51006.pdf
MahdiOccasional Contributor
Occasional ContributorThank you for your answer. But, the main issue is the interconnection delay. That document basically gives you some ideas to have a better accelerator design.
