How to interface with bidirectional pins from an internal data bus in a .bdf file

Hello JMona1,

Pins on an FPGA have special logic to implement inout behaviour.

They can have high impedance (Hi-Z) or output.

Signals on internal FPGA logic (your flipflops) do not have this logic.

What you are trying to do is to have 2 flipflops control 1 fpga pin.

If the state of flipflop A is 1 and the B is 0, then what should the value of the pin be?

So this is the reason if you connect 1 flipflop with a pin, you are ok, if you connect 2 flipflop outputs to 1 fpga pin, you are in trouble.

Mux is a good solution, you can use other solutions a logic OR of both signals provided you can guarantee all are 0 except one. This is a kind of "open collector" hardware approach equivalent.

If you implement a cpu in an FPGA (Nios-II) for example, you will see that PIO signals that are configured in platform designer as inout end up as a single in and a single out port. Signals that are ment to control SDRAM dual port pins end up as inout signals.

There could be other solutions as well, but I do not consider my self an expert in the matter.

Best Regards,

Johi.