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JSLY's avatar
JSLY
Icon for New Contributor rankNew Contributor
4 years ago

How to Instantiate PLL and Reset without using QSYS or Platform designer

I have relatively simple design using logic only, no SOC or NIOS or hard processor. I need to Instantiate the internal PLL and Reset monitor, can I do this manually or do I need to use Platform des...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

In the main Quartus Prime software, you access IP, like a PLL, from the IP Catalog. You generate the IP, which includes instantiation templates which simplifies instantiating the IP into your HDL code.

As for I/O, after performing at least Analysis & Elaboration (first stage of synthesis), you can open the Pin Planner from the Assignments menu to make I/O assignments.