How to instantiate multiple components with variable number of ports in vhdl?

Hi,

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the couple of components are Pre_pre_buffer_conv and Pre_buffer_conv and the code is presented below. How I can to declare the signal xdataout_preprebuffer?

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Can you check with,

Replace xdataout_preprebuffer(i) with xdataout_preprebuffer

No need to use ….(i) in other places as well in entire code.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation)