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Altera_Forum
Honored Contributor
10 years agoHow to include Component Declaration Files (.cmp)
Hello, Can anyone tell me how to use the component declaration file generated by the Quartus IP catalog tool in another file? ( have been writing AHDL for many years but I am new to VHDL). ...
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Hello, Can anyone tell me how to use the component declaration file generated by the Quartus IP catalog tool in another file? ( have been writing AHDL for many years but I am new to VHDL). As an example I have a component shiftcounter and the IP tool generates a file shiftcounter.cmp including the following: component shiftCounter PORT (clk_en : IN STD_LOGIC ; clock : IN STD_LOGIC ; cnt_en : IN STD_LOGIC ; data : IN STD_LOGIC_VECTOR (7 DOWNTO 0); sclr : IN STD_LOGIC ; sload : IN STD_LOGIC ; q : OUT STD_LOGIC_VECTOR (7 DOWNTO 0) ); end component; At the moment I keep copy & pasting this into the VHDL files that use that component but I'm sure there must be a way to "include" it. Any clues, please? Thanks. --- Quote End --- it is meant for copy/paste in a top level vhdl that wants to instantiate it. It is good for those of us lazy enough not to copy/paste from entity interface then just changing "entity" word to "component"