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Honored Contributor
Honored ContributorHow to enforce the used DATA input of a LUT?
Hi, I am implementing a Physically Uncloneable Function with Ring-Oscillators (RO) on Cyclone IV FPGAs. Each RO consists of 16 LCELLs, placed in the 16 LEs (i.e. LUTs) of another LAB. With...
Altera_ForumHonored Contributor
Honored ContributorIt wasn't public yet, but FPGAs are starting to have PUFs in them. This is the high-end product coming out:
https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/wp/wp-01252-secure-device-manager-for-fpga-soc-security.pdf
