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Altera_Forum
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14 years ago

How to do post-synthesis simulation in ModelSim?

I only know how to do RTL functional simulation (only need HDL files) and GTL timing simulation (need .vo or .vho and .sdo files)in ModelSim. However, how can I do post-synthesis simulation in Model...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Thanks very much, Dave. But how can I check how much clock routing resources I have used for the design in my FPGA chip?