Forum Discussion
NuvKFC
Contributor
ContributorHow to deal with integrated clock gating cell on FPGA?
I'm a ASIC/SoC prototyping user.
I get an ASIC design which include many clock gating by and gate, or gate, and integrated clock gating cell (latch base).
From the following page, I know that cl...
NuvKFCContributor
ContributorCould someone please tell me some keyword or some information? Thank you very, very, very, so much.
