Forum Discussion
NuvKFC
Contributor
ContributorHow to deal with glitch free clock switch when use auto gated clock conversion?
I get an ASIC design which contains many glitch free clock switch as follows picture. When I use auto gated clock conversion option, tool said that it's an unsupported cascaded clock so that tool can...
Hi KFC,
Can you refer to below document. Make sure all the requirement are met in order to convert gated clock.
SyafieqS
Super Contributor
Super ContributorHi KFc,
What device are you using for ASIC prototyping?
Auto Gated Clock Conversion logic option only available Arria series, Cyclone II, Cyclone III, Cyclone IV, HardCopy series, Stratix II, Stratix II GX, Stratix III, Stratix IV, and Stratix V) families. You need to double check this.
NuvKFCContributor
ContributorHi SyafieqS_Intel
Thank you, SyafieqS_Intel, very much. I'm using Stratix IV. But tool said that it's an unsupported cascaded clock so that tool can't convert it.
