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Altera_Forum
Honored Contributor
Honored ContributorHow to create a neg-edge Write pulse, from a pos-edge Write pulse?
I have a active-high signal that transitions on the positive edge of its clock when it has data ready to be written to memory. I also have ram memory (uses same clock) but expects the write ...
Altera_ForumHonored Contributor
Honored ContributorCan you post the code you have so far? It's a little tricky to visualize what you're doing.
