Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThank you for your responses.
What if I make several logiclock regions (at the top level design) and import a same design partition (which is already complied, placed, and routed) into all these logiclock regions? Will all those regions have the same routing as the imported design? I need to have identical routing, because I want to miniminze (as much as possible) the delay variations associted with routing and concentrate on other sources of delay.