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Altera_Forum
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10 years ago

How to convert CPLD pin assignment from Allegro Design Entry CIS to Quartus II

Hello, I am using Altera MAX V device. I already have a schematic completed in Allegro Design Entry CIS (.dsn file) with the CPLD signals assignment. My question is there a automated method ...
Altera_Forum's avatar
Altera_Forum
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10 years ago

I'm not aware of an 'automated' method. However, I suggest you write yourself a script (in Python, for example) to take the data from the .dsn file and directly create the required entries for you Quartus project. The CPLD pinout information is captured in the .qsf (Quartus Settings File) for your project. Simply make your script create entries, one line per signal/pin. E.g. 

set_location_assignment PIN_A15 -to your_signal

Automating it that way will take the error out of the process.

Cheers,

Alex