Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

How to connect my FIFO to mSGDMA inside Qsys?

I create my PCIe project based on Wiki's examples, removed the DDR3 and added FIFO inside Qsys. I can't connect my FIFOs to mSGDMA after i added them to my Qsys. I attached the project.
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

--- Quote Start ---

Sorry was out on vacation. Yes Qsys will perform many types of adaptation between masters and slaves. When you design a master or slave you design it using the Avalon/AXI spec and not worrying about other IP connecting to it.

--- Quote End ---

Hi BadOmen,

It's ok! I'm designing my logic to put/take data to/from my Qsys system, which include PCIe interface. So this is why i posted this question.