Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHow to connect my FIFO to mSGDMA inside Qsys?
I create my PCIe project based on Wiki's examples, removed the DDR3 and added FIFO inside Qsys. I can't connect my FIFOs to mSGDMA after i added them to my Qsys. I attached the project.
Altera_Forum
Honored Contributor
11 years agoSorry was out on vacation. Yes Qsys will perform many types of adaptation between masters and slaves. When you design a master or slave you design it using the Avalon/AXI spec and not worrying about other IP connecting to it.