How to connect my FIFO to mSGDMA inside Qsys?

Hi Jerry,

sorry for the late answer.

The Write-Master writes to your Host-Memory. It reads from your Fifo.

The Read-Master reades from your Host-Memory. It writes to a (whatever) Data Sink.

This is, why you have to connect the Output of your Fifo (Streaming source) to the Write-Master (Streaming sink).

When you have a mismatch in data-width of write-master and fifo, you should correct this by editing the parameters of those cores.

If you want to use a 256Bit fifo, you should also configure the write-master with a 256Bit fifo. At the moment the write-master fifo is 8Bit.

Of course QSYS gives you this mismatch error.

Just double click the write master and configure the data fifo to 256Bit.