How to compansate external phase-shift

If you've properly entered timing constraints, and instructed the fitter to optimize hold timing, the fitter ought to be able to add delay to compensate for the phase shift. You'll need to specify the input delay for each individual signal. I assume these are regular I/O signals.

There are of course other methods. You could create a PLL with multiple outputs at different phases for sampling your input signals. You would then have to resynchronize these to a common clock domain.

Jake