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gyuunyuu's avatar
gyuunyuu
Icon for Contributor rankContributor
6 years ago

How to add top level generic into a Qsys system?

Some custom VHDL components in my Qsys system have test modes. These are controlled via generics on their top level. These components are currently in a Qsys system. In Qsys, I can click on them and ...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Sorry for any confusion. For your information, as I look into the qsys_system.vhd (which I believe is the top level of Qsys HDL file) inside folder qsys_system\synthesis\, I am able to find the generics for qsys_component as following. Would you mind to further elaborate on the specific generic that you are looking for if it is something different from the existing?

"

component qsys_component is

generic (

counter_max : integer := 15;

write_address : std_logic_vector(31 downto 0) := "00000000000000000000000000000000"

);

port (

clk : in std_logic := 'X'; -- clk

reset_n : in std_logic := 'X'; -- reset_n

avm_write : out std_logic; -- write

avm_write_data : out std_logic_vector(31 downto 0); -- writedata

avm_write_address : out std_logic_vector(7 downto 0); -- address

avm_wait_request : in std_logic := 'X' -- waitrequest

);

end component qsys_component

"

Please let me know if there is any concern. Thank you.

Chee Pin

  • gyuunyuu's avatar
    gyuunyuu
    Icon for Contributor rankContributor
    6 years ago
    Dear cpchan, I want that the generics that exist on the qsys_component are exposed in the qsys_system. In other words, entity qsys_system is port ( clk_clk : in std_logic := '0'; -- clk.clk reset_reset_n : in std_logic := '0' -- reset.reset_n ); end entity qsys_system; Should become: entity qsys_system is generic ( counter_max : integer := 15; write_address : std_logic_vector(31 downto 0) := "00000000000000000000000000000000" ); port ( clk_clk : in std_logic := '0'; -- clk.clk reset_reset_n : in std_logic := '0' -- reset.reset_n ); end entity qsys_system; In this way, I can access and change the generic passed to the componet when I instantiate the Qsys system in my VHDL RTL code. Is the question clear now? Regards, Hassan Iqbal