How to add NEW counter Custom Qsys Components ?

Hello, i am a newbie, and having verilog counter code. I don`t know how to add "counter" as a NEW CUSTOM Qsys components?

module counter_qsys (

out , // Output of the counter

clk , // clock Input

);

input clk;

output [7:0] out;

reg [7:0] out=0;

//-- Sensitive to rising edge

always @(posedge clk) begin

//-- Incrementar el registro

out <= out+1;

end

endmodule

In qsys, i have clicked NEW component, and i got one pop-window. But in block "out" port is missing. I dont whether i am doing right or wrong. Please anyone guide me.