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Altera_Forum
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18 years ago

How does TimeQuest Analysis determine Launch edge & Latch edge?

I have to clocks generated from PLL. CLKA is 80Mhz, CLKB 100MHz. I noted that the launch edge is 10ns and latch edge is 12.5ns in setup time report from CLKB to CLKA. How does TimeQuest ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

If CLKA and CLKB are coming from the same PLL, I think they're consider synchronous (they are generated from the same clock with certain relationship). Therefore, TimeQuest is able to determine the launch & latch edge. For asynchronous clock, I don't think TimeQuest has a way to determine it since the 2 clocks relationship is unknown. So you need to set false path for asynchronous clock domain crossing to tell the TimeQueste not to analyze those paths. Hope it helps.