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frank2597's avatar
frank2597
Icon for New Contributor rankNew Contributor
2 years ago
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How does signal routing work in Platform Designer(QSys)

Hello, I am developing software for the DE10 Nano board and i am new to working with Platform designer and had some questions to better my understanding. I am working with a golden reference design ...
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  • sstrell's avatar
    sstrell
    2 years ago

    The thing about Platform Designer is that you don't need to know any of these details. As long as Avalon host and agent interfaces follow the Avalon standard, they can be connected together and PD will automatically build the interconnect based on these connections.

    To answer your specific questions, the address signal is a single bit because there is only 1 (or maybe 2) addressable locations in this custom component. The read and write inputs are control signals to read from or write to the custom component.

    Not sure if that answers your questions. Check out this training to learn about standard interfaces: https://cdrdv2.intel.com/v1/dl/getContent/652986

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

The thing about Platform Designer is that you don't need to know any of these details. As long as Avalon host and agent interfaces follow the Avalon standard, they can be connected together and PD will automatically build the interconnect based on these connections.

To answer your specific questions, the address signal is a single bit because there is only 1 (or maybe 2) addressable locations in this custom component. The read and write inputs are control signals to read from or write to the custom component.

Not sure if that answers your questions. Check out this training to learn about standard interfaces: https://cdrdv2.intel.com/v1/dl/getContent/652986