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Altera_Forum
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11 years ago

How do you launch "Memory Test" in Nios ii EDS command shell

Hello, I'm trying to get the CFI interface to the Flash chip on the Altera cylone III development board working and I'm stuck because I'm unable to talk to the flash chip (or at least that is w...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Please be concise.

How do you reset your board ? Off/ON or press button (or other input) ?

You seem NOT to program FPGA with EPCS memory. You configure FPGA through JTAG : It looses its configuration at power off.

Have you set the reset vector at the Flash memory address in QSYS ?

Could you describe how do you manage your board configuration ?

EPCS + FLASH

or All (hardware + software) in FLASH

or All in EPCS ?

I hadly understand you