New Contributor
New ContributorHi Nurina,
Here's the schematic of my connection between the 'q' bus and the 'data' bus bits. It looks so simple, but i think i need to re-define something.
I'm simply just trying to achieve the following simple connections:
q[3] to data[3]
q[2] to data[2]
q[1] to data[1]
q[0] to data[0]
NOTE: q[4] & q[5] aren't being used at the moment...
New ContributorWas there a command to use multiple signals on the SAME bus?
Maybe something like q[5..0] , data[3..0] ???
Is there a comma or semi-colon etc needed to separate the groups of wire definitions on the SAME bus?
