Hold time violations and clock distribution

Hello,

you are very welcome. Glad your problem has been solved.

You are correct: going through the LCELL will add a bit of delay but then it will be distributed equally.

The warning is actually about something else.

Sometimes, people attempt to use chains of LCELLs to delay signals, which isn't a good idea -- those delays are quite dependent on process, temperature, voltage, etc.

Since this isn't what you're trying to do and you don't care about the delay, it's not an issue for you.