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Altera_Forum
Honored Contributor
Honored ContributorHigh-Z on Differential Port
Hi, Following this example https://www.altera.com/en_us/pdfs/literature/an/an754.pdf, I tried to implement a mipi-csi2 function on a Cyclone V. I have 2 pairs of 2 lines, one is single-ended...
Altera_ForumHonored Contributor
Honored ContributorIt's possible, review application notes about bus LVDS and how to implement it in Cyclone V. It has to use differential SSTL I/O standard.
It's actually a FPGA hardware rather than VHDL question, wrong forum.
