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Altera_Forum
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8 years ago

High-Z on Differential Port

Hi, Following this example https://www.altera.com/en_us/pdfs/literature/an/an754.pdf, I tried to implement a mipi-csi2 function on a Cyclone V. I have 2 pairs of 2 lines, one is single-ended...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

It's possible, review application notes about bus LVDS and how to implement it in Cyclone V. It has to use differential SSTL I/O standard.

It's actually a FPGA hardware rather than VHDL question, wrong forum.