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antonto's avatar
antonto
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Hi, Im trying to make testbench but i get this error (vsim-7) Failed to open readmem

** Warning: (vsim-7) Failed to open readmem file "D:/altera askhseis/tbtest999/stimulus.tv" in read mode. # No such file or directory. (errno = ENOENT) : D:/altera askhseis/tbtest999/tbtest.sv(23) ...
antonto's avatar
antonto
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

@SyafieqS @sstrell Thanks for replying! I changed the path and now im getting this error

** Error: (vsim-3033) topModule.svo(53678): Instantiation of 'fiftyfivenm_adcblock' failed. The design unit was not found.
# Time: 0 ps Iteration: 0 Instance: /topModule File: topModule.svo
# Searched libraries:
# D:/fpga19.1/modelsim_ase/altera/verilog/altera_mf
# D:/alteraAsk/topModule/simulation/modelsim/gate_work


Any ideas on what to do?