Forum Discussion
KhaiChein_Y_Intel
Regular Contributor
6 years agoHi,
From the scrren shot, I can see that the clock signal does not toggle.
Can you simulate using ModelSim Starter edition (Free edition)? You may
- Convert the BDF file to HDL file by clicking on File > Create/Update > Create HDL Design File From Current File
- Create Test Bench template by clicking on Processing > Start > Start Test Bench Template Write
- Find the test bench created in simulation/modelsim/*.vt or .vht, edit the test bench with the input signal
- Simulate the design
Thanks.
Best regards,
KhaiY