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Which code are you referring to. The code posted by Kaz compiles just fine. Have you tried to modify it?
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No i have done no modifications to it, you can see below:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity uppgift_dorr is
port( clk : in std_logic; --clock signal
reset_n : in std_logic; --reset signal
key_0, key_1, key_2, key_3 : in std_logic;
LEDR : out std_logic_vector(1 downto 0);
LEDG : out std_logic_vector(1 downto 0)
);
end uppgift_dorr;
architecture Behavioral of uppgift_dorr is
--Defines the type for states in the state machine
type state_type is (closed,opened,locked,error);
--Declare the signal with the corresponding state type.
signal Current_State, Next_State : state_type;
--Additional signals to work with the debounce process
signal count_0 : unsigned(17 downto 0) := (others => '0');
signal count_1 : unsigned(17 downto 0) := (others => '0');
signal count_2 : unsigned(17 downto 0) := (others => '0');
signal count_3 : unsigned(17 downto 0) := (others => '0');
signal key_0_d,key_0_final: std_logic;
signal key_1_d,key_1_final: std_logic;
signal key_2_d,key_2_final: std_logic;
signal key_3_d,key_3_final: std_logic;
--Debounce process
begin
--debounce
process(clk)
begin
wait until clk = '1';
key_0_d <= key_0;
if key_0 = key_0_d then
count_0 <= count_0 +1;
else
count_0 <= (others => '0');
end if;
if count_0 > 250000 then -- about 5 msec bounce time
key_0_final <= key_0;
end if;
key_1_d <= key_1;
if key_1 = key_1_d then
count_1 <= count_1 +1;
else
count_1 <= (others => '0');
end if;
if count_1 > 250000 then -- about 5 msec bounce time
key_1_final <= key_1;
end if;
key_2_d <= key_2;
if key_2 = key_2_d then
count_2 <= count_2 +1;
else
count_2 <= (others => '0');
end if;
if count_2 > 250000 then -- about 5 msec bounce time
key_2_final <= key_2;
end if;
key_3_d <= key_3;
if key_3 = key_3_d then
count_3 <= count_3 +1;
else
count_3 <= (others => '0');
end if;
if count_3 > 250000 then -- about 5 msec bounce time
key_3_final <= key_3;
end if;
end process;
--------------
begin
-- Synchronous Process
p0: process(clk, reset_n)
begin
if( reset_n = '0' ) then --Synchronous Reset
Current_State <= opened;
elsif (rising_edge(clk)) then --Rising edge of Clock
Current_State <= Next_State;
end if;
end process;
-----------------------------------------------------------------------------
-- Combinational Process
p1: Process(Current_State, key_0_final, key_1_final, key_2_final, key_3_final)
begin
case Current_State is
when opened =>
LEDG <= "01"; LEDR <= "00";
if ( key_0_final = '0' ) then
Next_State <= closed;
--else
-- Next_State <= opened;
end if;
when closed =>
LEDG <= "10"; LEDR <= "01";
if ( key_1_final = '0') then
Next_State <= opened;
elsif (key_2_final = '0') then
Next_State <= locked; --recent change it was key_2 locked
else
Next_State <= closed; ---here was closed
end if;
when locked =>
LEDG <= "00"; LEDR <= "10";
if ( key_3_final = '0') then -- Låser upp dörren
Next_State <= locked;
elsif(key_2_final = '0')then -- tray to lock, error
Next_State <= error;
else
Next_State <= closed;
end if;
LEDR <= "00";
when error =>
LEDG <= "11"; LEDR <= "11";
Next_State <= error;
end case;
end process;
end Behavioral;
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